for *V*_{G} = 0 V, -.2 V, -.4 V, ...., -1.4 V

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The behavior of an n-channel junction field-effect transistor (nJFET) is largely controlled
by the voltage at the gate (usually a *negative* voltage).
For the usual drain-source voltage drops (i.e., the __saturation region__:
positive voltages from a few volts up to some breakdown voltage) the drain
current (*I*_{D}) is nearly independent of the drain-source voltage
(*V*_{DS}), and instead
depends on the gate voltage (*V*_{G}).
(This is unusual behavior: usually more voltage
produces to more current, but here the current only increases
slightly with increasing *V*_{DS}.) The __transconductance__,
i.e., the ratio of the change in drain current to change in gate voltage,
often denoted by *g* or *y*_{fs}, is

*g* = *y*_{fs} =
*I*_{D}/*V*_{G}

In the simplest approximation the characteristic curves of a nJFET are a set of flat lines:

Each (flat) curve shows that *I*_{D} doesn't change with changing
*V*_{DS}. The different levels show that *I*_{D}
does depend on *V*_{G}. The spacing of the constant-*I*_{D}
curves is usually not constant, instead *I*_{D} depends quadratically
on *V*_{G}:

*I*_{D}=*K*(*V*_{G}-*V*_{TO})^{2}

where the threshold (or pinch-off) voltage *V*_{TO} and *K* are constants.
The maximum drain current (which occurs at zero-gate voltage, i.e., *V*_{G}=0)
is denoted *I*_{DSS}. The value of *K* can be determined from
*I*_{DSS} and *V*_{TO}:

*I*_{DSS} = *K*(0-*V*_{TO})^{2}

A slightly more complicated approximation takes into account the sloping of the characteristic curves. In bipolar transistors this is due to the Early Voltage, here a very similar equation results from quite different physics: channel length modulation. The equation looks like:

1/*V*_{A} =

So in this model all the
characteristic curves all have a common *x*-axis intercept
at the large negative voltage -1/. (The dashed curves
are far from the active region and in no way represent the actual behavior of
the transistor for negative *V*_{DS}. In fact, the transistor
is not designed to be operated with negative *V*_{DS}.)

(For the above measured 2N5457, 1/ ranges from 250 to 750 V, so the characteristic curves have small but variable slopes.)

The actual relationship between the drain current (*I*_{D})
and the controlling gate voltage (*V*_{G}) and
drain-source voltage drop (*V*_{DS}) is some complicated
function which we can denote:

*I*_{D}(*V*_{G},*V*_{DS})

Like any function we can approximate it near a particular point using just the first terms of a Taylors expansion:

Clearly these *admittance (y) parameters* are not constants.
For example *y*_{os} is the slope of a characteristic
curve, which is small for voltages near threshold and increases
for larger *V*_{G}. (Note that slope on an *I-V*
is basically the inverse of the resistance. Thus 1/*y*_{os}
can be described as the output impedance. A typical value for
1/*y*_{os} would be 100,000 .)

The defining parameter -- the transconductance
*g* or *y*_{fs} -- is not at all
constant. To the extent that the drain current depends
quadratically on the gate voltage, the transconductance -- which is the
derivative: d*I*_{D}/d*V*_{G} --
depends linearly on *V*_{G} above
threshold. Below is the measured
relationship: *I*_{D} vs *V*_{G} for the above 2N5457.
Notice that for *V*_{G}>*V*_{TO}, the drain current
is well approximated by the quadratic, whereas for *V*_{G}<*V*_{TO}
(i.e., sub-threshold) the drain current depends approximately exponentially on *V*_{G}.
Thus the drain current is not strictly zero below threshold, merely exponentially small.

The characteristic curves focus on the output of the transistor, but we
can also consider the behavior of the input. In normal operation the
gate is a reversed biased diode, and so *I*_{G} is essentially
zero (which should sound like a huge input resistance).
As a result the outputs have little
effect on the inputs, but if we follow the traditional analysis
the actual functional relationship giving the
gate current (*I*_{G}) from
the gate voltage (*V*_{G}) and
drain-source voltage drop (*V*_{DS}) is some complicated
function which we can denote:

*I*_{G}(*V*_{G},*V*_{DS})

Like any function we can again approximate it near a particular point using just the first terms of Taylors expansion:

The small values of *y*_{rs} and *y*_{is} shows that the input is
largely unaffected by the output and that the input resistance is huge. In fact
this input resistance is so large that the capacitance reactance is almost always
of greater significance.

Finally it should be noted that in the small *V*_{DS} region -- before the
saturation region -- the FET characteristic curves look like nearly straight lines through the origin.
*V*_{G} controls the slope of these lines, so the FET acts like a
variable resistor with a voltage (*V*_{G}) control. Here is a plot of this region for the above
2N5457:

The spec sheet reports the following values for the 2N5457:

Characteristics | Symbol | Min | Max | Unit |
---|---|---|---|---|

Forward Transfer Admittance | y_{fs} |
1 | 5 | m mhos |

Output Admittance | y_{os} |
- | 50 | µ mhos |

Zero-Gate Voltage Drain Current | I_{DSS} |
1 | 5 | mA |

Gate Source Cutoff Voltage | V_{TO} |
-0.5 | -6.0 | V |

Input Capacitance | C_{iSS} |
- | 7.0 | pF |